Senior / Staff Engineer - Mixed Signal Verification

#WeAreIn for jobs that impact everyone's life. Build the future nobody’s dreamed of yet... are you ready to rethink the impossible? As a Mixed Signal Verification Engineer on our Research & Development team, you'll have the opportunity to merge creativity with your technical expertise by shaping the future of technology, driving groundbreaking projects, and bringing new ideas to life. Are you in?

Your Role

Key responsibilities in your new role

• Contribute to verification in complex projects: understanding requirements, actively supporting the definition & review of the verification plan, setting up verification metrics in digital, developing test cases and ensuring report compliance.

• Responsibilities involve the coordination of verification activities for given projects.

• Apply methodologies (e.g. Universal Verification Methodology (UVM) and System Verilog) and execute tests in these environments on RTL on IP, and Sub-System

• Create reusable verification components and environments

• Closely cooperate with analogue and digital designers as well as concept and verification engineers

• Identify deficiencies in verification methodology and simulation performance, and implement improvements

• Identify and address synergies between Pre-Silicon Verification methodology and Post-Silicon Validation

This role is not just about verification; it’s about inspiring and mentoring junior verification engineers while providing invaluable technical support and guidance to development teams and business partners.

In addition, you will:

• Create new and improve existing verification environments

• Contribute to create a smooth x-domain verification & validation methodology

• Actively participate in Infineon verification communities

• Provide technical guidance/assistance when needed in the projects related to interaction topic

Your Profile

Qualifications and skills to help you succeed

• A degree in Electronics Engineering or a similar field of studies with specific knowledge in semiconductor development with at least 5 years of pre-silicon verification experience using the UVM methodology

• Demonstrates technical proficiency with state-of-the-art verification methodologies and tool flows.

• Act as a technical lead through exploring new environments and identifying potential enhancement areas through new methodology

• Good knowledge of VHDL, Verilog, C, C++, SystemVerilog

• Self-motivated, flexible, good communication with interpersonal skills, and is a good team player who can work well with both internal and external partners

• Candidate has proven ability to achieve results in a very dynamic, multi-site environment and be able to coordinate with priorities and self-initiatives, demonstrated innovation drive, ability to improve efficiency through scripting and automation, strong stakeholder management across multiple groups & sites

• Fluent English communication is mandatory

It is an advantage if you have:

• Advantage: Knowledge of analogue & mixed-signal IC verification methodologies and tools (e.g. XA/VCS, AMS-Designer, …)

• Experience with requirements management methodologies

• Experience with automotive standards (ISO26262)

• Experience as a technical lead and/or mentor

Contact:

Sherlene Ong

#WeAreIn for driving decarbonization and digitalization. As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener. Are you in?

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