Senior Staff Engineer Analog Mixed-Signal Verification

Highly skilled AMS Verification Engineer with expertise in SystemVerilog RNM modeling, AMS verification, and Automotive mixed-signal products. Proven track record in leading subsystem and full-chip (AoT) verification, developing high-performance behavioral models, AMS test plans, checkers, assertions, and coverage solutions. Strong knowledge of BGR, LDO, Buck-Boost regulators, Cadence/Synopsys simulation environments, SoC power analysis, and automation using Python, Perl, and Shell scripting. Recognized for driving verification efficiency, enabling system-level validation, and mentoring engineering teams.

Your role

Key responsibilities in your new role

• Developing AI based Advance behavioral Real Number Model using system Verilog for analog/mixed-signal (AMS) verification, optimizing speed and accuracy trade-offs for pre-silicon validation.

• Lead AMS verification of Automotive products at sus system & Full chip (Analog on top).

• Develop AMS test plan by understanding requirements and AMS checkers.

• Behavioral model development for analog blocks using System Verilog (RNM).

• Good understanding on EDA tools/simulators (Cadence - virtuoso schematic editor, Xcelium, APS/XPS OR Synopsys – VCS). Good understanding of analog design concepts – BGR, LDO, Buck – Boost Regulators.

• Experience in Python, Perl, Shell scripting is added advantage.

Your profile

Qualifications and skills to help you succeed

• Good working experience in Analog & mixed signal verification domain.

• Good understanding of analog circuits and ability to write SV RNM models using SV.

• Ability to develop AMS test plan, implement TB components, integrate spice netlists, develop checkers, assertions, coverage, and debugging AMS simulations.

• Interact with Analog, RTL & DV teams to bring up system level scenarios in AMS environment.

• Efficient working knowledge on EDA tools/simulators (Cadence - virtuoso schematic editor, Xcelium, APS/XPS OR Synopsys – VCS, Customsim).

• Provide support to characterization teams during post-silicon validation.

• Self-motivated to work effectively & incorporate next generation AMS methodologies.

• Handling project dynamics on scope, schedule and effort – coming up with alternative verification plans, Mentoring Junior engineer.

• Ability to perform Power analysis at SOC level.

• Automation using shell/Perl/Python script.

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