Lead Principal Engineer - Digital Design

You will be responsible for the architecture, design, and delivery of complex digital IP, ASIC, and SoC solutions. This role drives key technical initiatives, leads major subsystem developments, and collaborates across engineering organizations to deliver high-quality silicon products. The individual is expected to provide technical leadership, mentor engineers, and influence design decisions that impact product success.

Your role

Key responsibilities in your new role

• Lead architecture, micro architecture, and RTL design of complex digital subsystems, IPs, and SoCs.

• Drive end-to-end design execution from concept, specification, and implementation through silicon bring-up and production.

• Make key technical decisions and trade-offs to optimize performance, power, area, quality, and scalability.

• Collaborate with architecture, verification, physical design, firmware, software, and validation teams to ensure successful product delivery.

• Establish and drive adoption of digital design methodologies, quality standards, and engineering best practices.

• Lead technical reviews, design sign-offs, risk assessments, and root-cause analysis for complex issues.

• Drive innovation, technology roadmap planning, and development of next-generation solutions.

• Contribute to patents, technical publications, and strategic technology initiatives.

Your profile

Qualifications and skills to help you succeed

• Bachelor's, Master's, or Ph.D. in Electrical Engineering, Electronics Engineering, Computer Engineering, or a related field.

• 12+ years of industry experience in digital IC design and semiconductor product development.

• Extensive experience in architecture, microarchitecture, RTL design, and SoC/IP development.

• Proven success delivering complex semiconductor products from architecture definition through silicon validation and production.

• Expert-level proficiency in Verilog/System Verilog and modern ASIC/SoC development flows.

• Strong understanding of:

• Performance, Power, and Area (PPA) optimisation

• Clocking and reset architectures

• Design-for-Test (DFT)

• Low-power design methodologies

• Timing closure and physical design considerations

• Semiconductor development and productization processes

• Experience leading technical reviews, design sign-offs, risk assessments, and root-cause investigations.

• Strong stakeholder management, communication, and collaboration skills.

#WeAreIn for driving decarbonization and digitalization. As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener. Are you in?

We are on a journey to create the best Infineon for everyone. We strive to create the best Infineon for everyone by embracing diversity and inclusion. We welcome applicants for who they are and offer a workplace built on trust, openness, respect and equal opportunity. Our hiring decisions are based on skills and experience. Even if you don’t meet every requirement, we encourage you to apply. Please let your recruiter know if you need any accommodations during the interview process. Learn more about our various contact channels and about Diversity & Inclusion at Infineon.