AFE - Analog Manager

OUR STORY

At STMicroelectronics, we believe in the power of technology to drive innovation and make a positive impact on people, businesses, and society. As a global semiconductor company, our advanced technologies and chips form the hidden foundation of the world we live in today.

When you join ST, you will be part of a global business with more than 115 nationalities, present in 40 countries, and comprising over 50,000 diverse and dedicated creators and makers of technology around the world.

Developing technologies takes more than talent: it takes amazing people who understand collaboration and respect. People with passion and the desire to disrupt the status quo, drive innovation, and unlock their own potential.

Embark on a journey with us, where you can innovate for a future that we want to make smarter and greener, in a responsible and sustainable way. Our technology starts with you.

About the Role

To lead analog design team, technically and managerially, that is able to define and finalize analog and mixed signal IPs and Blocks, from feasibility study to complete qualification and production. The person will be responsible for leading the team responsible for development of advanced AMS IPs for advanced systems with focus on low power, low area and high performance, that includes specification discussions (with SoC teams and customers), feasibility analysis (with quick turn-around time), design and verification of these IPs and Blocks. The role also involves supporting customers in integrating these IPs in the SoC. The person will also be responsible for analyzing the results from Silicon and CAD v/s Silicon correlation of IPs. To innovate and develop new architectures to achieve best-in-class PPA (Power, Performance and Area) for the IPs

Key Responsibilities

• Responsible for development of advanced AMS IPs and Blocks, that includes specification discussions (with SoC teams and customers), feasibility analysis (with quick turn-around time), design and verification of these IPs. This involves

  • Understand functional, performance and integration requirements
  • Proficiency in EDA tools for AMS design
  • Develop and maintain circuits as per specification
  • Customer Interaction
  • Knowledge Sharing
  • Silicon debug and analysis
  • Innovation/Development of new architectures to achieve best-in-class PPA (power, performance, area) for the IPs

• Provide technical leadership across multiple analog teams, setting direction on methodology, tooling, and reuse strategy.

• Own escalation and resolution of critical issues, including specification ambiguities, cross-team dependencies, and schedule-critical bugs.

• Represent analog domain from Noida in program-level reviews, providing risk assessment, closure confidence, and sign-off readiness to senior management and stakeholders.

• Mentor and develop senior and mid-level analog engineers; build technical depth and succession within the team.

• Evaluate and drive adoption of new analog tools, flows, and AI-assisted techniques to improve productivity and quality.

• Collaborate with external vendors and EDA partners to resolve tool and methodology issues.

Required Skills

• Bachelor's/master's/PhD degree in Electronics, Electrical, or Computer Engineering (VLSI specialization preferred).

• 15+ years of experience in analog design

  • Expertise in Circuit Theory, Signal Processing and Control System
  • Good understanding of CMOS and VLSI technologies (device physics and layout effects and sub-micron effects).
  • Expertise in ADCs design and various ADC architectures (SAR, Pipeline, Flash and Sigma Delta) and/or Power Management Blocks and/or Clock Generation IPs
  • Strong fundamentals on noise, mismatch and other analog effects and sensitivities, with it’s impact on IP and system performance
  • Proficient in usage of all EDA tools used in analog mixed signal design (e.g. Cadence - Virtuoso/OA for schematic and layout design, PLS, analog simulation tools (e.g. Spectre/Eldo/XA), Matlab etc.)
  • Good Debugging and Analysis skills
  • Good understanding of ESD from IP design point of view
  • Excellent communication skills and ability to work effectively with others

• Strong understanding of image sensor interfaces and imaging SoC architecture

• Demonstrated ability to lead cross-functional technical discussions and drive alignment across design, architecture etc.

• Exposure to AI/ML-assisted techniques to improve productivity and efficiency.

Preferred / Good to Have

• Experience in Analog IP modeling

• Adaptable, Flexible, Creative and capable of working independently as well as a team player. Should have a strong sense of urgency.

• Solutions orientation; Quality driven; Execution minded; Customer focused

• Patents and publication in Analog Design.

• Should be able to drive innovation and develop new architectures

Soft Skills

• Strong technical leadership with the ability to set direction and influence without direct authority across teams.

• Excellent judgment in balancing schedule, risk, and verification thoroughness for sign-off decisions.

• Strong communication skills — able to translate technical risk into clear, actionable input for senior management.

• Structured, logical approach to problem decomposition and root-cause analysis on complex, ambiguous issues.

• Passion for mentoring and building technical capability within the team.

• Comfortable operating in a fast-paced, cross-functional, globally distributed program environment.

• Ownership mindset with the ability to work independently and drive closure under deadlines.

• Collaborative approach to working with design, architecture, and cross-functional teams.

• Exposure to AI/ML assisted verification techniques to improve verification productivity and efficiency.

What We Offer

• A high-impact technical leadership role shaping strategy for next-generation image sensor SoCs.

• Direct influence over methodology, tooling, and technical direction across the organization.

• Opportunity to work at the intersection of imaging, connectivity, and security IP.

• Mentorship and people-development opportunities as a manager

• Collaborative environment with global design, architecture, and EDA partner teams.

ST is proud to be one of the 17 companies certified as a 2025 Global Top Employer and the first and only semiconductor company to achieve this distinction. ST was recognized in this ranking thanks to its continuous improvement approach and stands out particularly in the areas of ethics & integrity, purpose & values, organization & change, business strategy, and performance.

At ST, we endeavor to foster a diverse and inclusive workplace, and we do not tolerate discrimination. We aim to recruit and retain a diverse workforce that reflects the societies around us. We strive for equity in career development, career opportunities, and equal remuneration. We encourage candidates who may not meet every single requirement to apply, as we appreciate diverse perspectives and provide opportunities for growth and learning. Diversity, equity, and inclusion (DEI) is woven into our company culture.

To discover more, visit st.com/careers.