Senior
SMTS, Design Rule Enablement Team TPG
Our vision is to transform how the world uses information to enrich life for all.
Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
Our vision is to transform how the world uses information to enrich life for all.
Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
Micron is seeking a highly experienced Senior Member of Technical Staff to lead Design Enablement efforts for DRAM technologies. This role involves coordinating cross-functional engineering teams across geographies to develop and optimize design rules, requirements, and test structures from early development through manufacturing.
Key Responsibilities:
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Lead efforts to develop and refine Design Rules, Requirements, and Test Structures for all DRAM generations and associated advanced CMOS.
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Define milestones for projects within the layout schedule and work with the various teams to achieve the targets and time-lines Partner with Design, Product Engineering, Process integration, Business Units and Quality groups to optimize PPAC (Performance, Power, Area, Cost) for all Micron DRAM products
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Manage test structure evaluation to support next-gen device development and quantify process margins.
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Define sub-milestones within layout schedules and ensure timely execution across teams.
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Address process window vs. die size issues arising from database layout techniques.
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Collaborate with Design, Product Engineering, Process Integration, Business Units, and Quality teams to optimize PPAC (Performance, Power, Area, Cost).
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Ensure robust Design Rule Checks (DRC) and appropriate responses to deviations.
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Strategically partner with multiple teams and fields to understand process issues related to the database layout, and prioritize development of solutions with Process Integration, Advanced Mask Design, Scribe & Frame, Layout & Design
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Document and communicate complex problem resolutions and drive cross-node design rule alignment.
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Maintain effective communication across Process Integration, Product Engineering, Design, and Advanced Mask teams.
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Improve documentation of R&D activities for design rule improvement
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Ability to define and implement design rules within APR workflows to enhance layout efficiency and manufacturability.
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Ability to utilize AI framework and develop workflow compatible with LLMs & other GenAI techniques for efficiency gain
Minimum Qualifications:
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MS/PhD in Electrical Engineering, Microelectronics, Physics, or related field.
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15+ years of experience in semiconductor industry in areas such as Process Integration, PDK development, Yield Enhancement, Product Engineering, Design, Test Structure Development, or Unit Process Development.
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Strong understanding of semiconductor process flow and key components of DRAM & advanced CMPS (e.g., Sense Amp, Word-line driver, Anti-Fuse, GAA, FinFET etc.).
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Experience with Test Structure Design and Characterization.
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Familiarity with Cadence & Siemens tools and ability to perform layout tasks.
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Proven success in resolving complex technical issues and communicating clearly under pressure.
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Exposure to CAD group interactions, data post-processing, and database/reticle data transfer.
About Micron Technology, Inc.
We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all. With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience.
To learn more, please visit micron.com/careers
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.
To request assistance with the application process and/or for reasonable accommodations, please contact hrsupport_japan@micron.com.
Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.
Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.
AI alert: Candidates are encouraged to use AI tools to enhance their resume and/or application materials. However, all information provided must be accurate and reflect the candidate's true skills and experiences. Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification.
Fraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc.
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