Staff Digital Design Engineer - DSP

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At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.

THE ROLE: This is an outstanding opportunity for an experienced engineer passionate about digital signal processing (DSP) algorithms and their application in high-speed SerDes (Serializer/Deserializer) systems. As part of a team, you will evaluate, design and optimize advanced DSP algorithms and circuits for 200+Gbps SerDes, with a strong focus on power efficiency and optimization. Your work will directly impact the performance and robustness of AMD’s next-generation connectivity solutions for markets such as data center networking, wireless telecommunications, and aerospace/defense.

THE PERSON: You are a collaborative team player with deep expertise in DSP theory and practical implementation. You communicate effectively across hardware, firmware, and algorithm teams, and thrive in a fast-paced, cross-site environment. Your analytical skills and commitment to continuous learning enable you to solve complex problems with novel solutions, elevating the team’s capabilities.

KEY RESPONSIBILITIES:

• Collaborate with architects, hardware, and verification engineers to define, refine and implement new DSP features for cutting-edge and next-generation SerDes transceivers with a focus on low power

• Evaluate and implement DSP algorithms for equalization, filtering and sequence detection

• RTL development and using front-end ASIC tools to ensure the highest quality code

• Develop comprehensive documentation detailing DSP algorithm interactions with SerDes hardware and software components

PREFERRED EXPERIENCE:

• Proven experience in DSP algorithm development for SerDes, wireless communications or high-speed serial interfaces (Ethernet, PCIe, etc.)

• Familiarity with equalization techniques such as FFE, CTLE, DFE or MLSE and their implementation

• Strong background in digital design techniques, RTL (preferably SystemVerilog), and ASIC front-end design tools and flows

• Understanding of power analysis and techniques for optimization of digital designs for low power

• Familiarity with simulation and modeling of DSP blocks in SerDes

EDUCATION: BSc or Masters in Electronics, Electrical or Computer Engineering, or related field.

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